Taiwan Semiconductor Manufacturing Company (TSMC) Reveals Details of 2nm Process Technology

The Taiwan Semiconductor Manufacturing Company (TSMC) has finally revealed the details of its 2nm process technology at the IEEE International Electron Devices Meeting (IEDM). The new process uses a GAA (Gate-All-Around) nanosheet transistor architecture, which provides better current control and performance optimization capabilities.

According to the testing data, the 2nm process has achieved a 1.15-fold increase in transistor density, with a 24-35% reduction in power consumption and a 15% improvement in performance. The SRAM density has reached a record-breaking 37.9Mb/mm^2. TSMC plans to mass-produce the 2nm process in the second half of 2025, with initial prices ranging from $25,000 to $30,000 per wafer. The first batch of customers may include Apple, Qualcomm, and MediaTek and other companies.